MCP18480T-I/SS【PDF 33/64 页】IC HOT SWAP CTRLR -48V 20SSOP

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Sheet目录44

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?2003 Microchip Technology Inc.

DS20091B-page 33

MCP18480

3.0 PIN DESCRIPTIONS

TABLE 3-1:

MCP18480 PIN DESCRIPTIONS

Pin Name

Number

Direction

Buffer

Type

Description

SSOP

POS

Positive supply input.

Internal Shunt Regulator connected between V

POS

and V

NEG

limits the

potential to 12V between these two pins. A series resistor must be

placed on the V

POS

pin to limit the current into the device.

Overvoltage protection threshold.

An external resistor divider network is connected to this input pin to

program the overvoltage protection threshold. The selected external

resistor values for the OV

to system ground and OV

to V

NEG

resis-

tors should have currents in the 1 mA range. A typical Overvoltage

threshold is -76V. Internal hysteresis in the overvoltage input compar-

ator will allow proper operation once V

NEG

falls below the selected

threshold.

Undervoltage lockout threshold.

An external resistor divider network is connected to this input pin to

program the undervoltage lockout threshold. If the voltage on UV

less than V

NEG

+ 2.5V, the undervoltage comparator will trip, indicating

an Undervoltage condition.

An external hysteresis resistor can be used to set the high-to-low

THF

) threshold below the low-to-high (V

THR

) threshold. For telecom

network equipment, it is desirable to have shutdown occur at -38.5V

and the startup set at -43.0V.

HYS

Undervoltage internal comparator hysteresis.

An external resistor is connected between this input to the UV

input

pin to adjust the hysteresis of the internal Undervoltage comparator.

Since it is desirable to shut down at -38.5V and restart at -43.0V in

telecom switch equipment.

I/O

Undervoltage event delay.

An external capacitor is connected to this input pin to set the delay

between when the UV

pin drops below the trip point specified by the

voltage on the V

REFIN

pin and when the system shutdown occurs

(causing the PWRGOOD pin to be driven to an inactive level and the

GATE pin to be pulled to the V

NEG

pin voltage level). The UV

sources a current equivalent to the I

ISET

(in typical applications, the

ISET

current equals 10 礎), which charges this external capacitor

while an internal comparator compares this voltage on the UV

pin to

REFIN

|/2.

Typically, for telecom equipment, the system is expected to shut down

when the input voltage falls below -38.5V (?.0V DC) for greater than

100 ms.

Legend: TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

I = Input

O = Output

P = Power

CMOS = CMOS-compatible input

A = Analog

D = Digital

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